1 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas inc. 2011. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. 40v, low quiescent current, 150ma linear regulator for automotive applications isl78301 the isl78301 is a high voltage, low quiescent current linear regulator ideally suited for ?always-on? and ?keep alive? automotive applications. the isl7 8301 operates from an input voltage of +6v to +40v under no rmal operating conditions and operates down to +3v under a cold crank. it consumes only 18a of quiescent current at no lo ad on the adjustable version. the isl78301 is available in a fixed 3.3v, 5v and adjustable output voltage (2.5v to 12v) option s. it features an en pin that can be used to put the device into a low-quiescent current shutdown mode where it draws only 2a of supply current. the device features over-temperature shutdown and current limit protection. the isl78301 is both aec-q100 qualified and fully ts16949 compliant. it is rated over th e -40c to +125c automotive temperature range and is availabl e in a 14 ld htssop with an exposed pad package. applications ?automotive ?industrial ? telecommunications features ? optimized for ?always-on? automotive applications ? 18a typical quiescent current ? guaranteed 150ma output current ? operates through cold crank down to 3v ? 40v tolerant logic level (ttl/cmos) enable input ? 2a of typical shutdown current ? low dropout voltage of 295mv at 150ma ? fixed +3.3v, +5.0v and adjustable output voltage options ? stable operation with 10f output capacitor ? thermal shutdown and current limit protection ? -40c to +125c operating temperature range ? thermally enhanced 14 ld exposed pad htssop package ? aec-q100 qualified ? 5kv esd hbm rated ? pb-free (rohs compliant) figure 1. typical application - adj version figure 2. typical application - fixed version figure 3. quiescent current vs load current (adj version at unity gain) v in = 14v in out en (isl78301) adj gnd c in 0.1f c out 10f r1 r2 v in = 14v v out = 12v in out en (isl78301) gnd c in 0.1f c out 10f v in = 14v v out = 5v 0 5 10 15 20 25 -50 0 50 100 150 temperature (c) quiescent current (a) october 21, 2011 fn6705.0
isl78301 2 fn6705.0 october 21, 2011 block diagram pin configuration isl78301 (14 ld htssop) top view reference + soft-start control logic thermal sensor + - ea vin en gnd vout fet driver with current limit adj 1 2 3 4 14 13 12 11 5 6 7 10 9 8 nc in nc nc nc nc en out nc adj/nc nc nc nc gnd thermal pad pin descriptions pin number pin name description 1, 3, 4, 5, 6, 9, 10, 11, 13 nc pins have internal termination and can be left unconnected. connection to ground is optional. 2 in input voltage pin. a minimum 0.1f ceramic capacitor is required for proper operation. 7 en enable pin. high on this pin enables the device. 8 gnd ground pin. 12 adj/nc in the adjustable output voltage option, this pin is co nnected to the external feedback resistor divider which sets the ldo output voltage. in the 3.3v and 5v options, this pin is not used and can be connected to ground. 14 out regulated output voltage. a 10f ce ramic capacitor is re quired for stability. epad it is recommended to solder the epad to the ground plane.
isl78301 3 fn6705.0 october 21, 2011 ordering information part number (notes 1, 2, 3) part marking temp. range (c) enable pin output voltage (v) package (pb-free) pkg. dwg. # isl78301fveaz 78301 fveaz -40 to +125 yes 3.3 14 ld htssop m14.173b isl78301fvebz 78301 fvebz -40 to +125 yes 5.0 14 ld htssop m14.173b ISL78301FVECZ 78301 fvecz -40 to +125 yes adj 14 ld htssop m14.173b notes: 1. add ?-t*? suffix for tape and reel. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ spec ial pb-free material sets, molding compounds/die attach materials , and 100% matte tin plate plus anneal (e3 termination finish , which is rohs compliant and compatible wi th both snpb and pb-free soldering opera tions). intersil pb-free products are msl classified at pb-fr ee peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jed ec j std-020. 3. for moisture sensitivity level (msl), please see device information page for isl78301 . for more information on msl please see techbrief tb363 .
isl78301 4 fn6705.0 october 21, 2011 absolute maximum rating s thermal information supply voltage, vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +45v in pin to gnd voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd - 0.3v to vcc out pin to gnd voltage . . . . . . . . . . . . . . . . . . . . . . . . .. . .gnd - 0.3v to 16v adj pin to gnd voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . .gnd - 0.3v to 3v en pin to gnd voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd - 0.3v to vcc output short-circuit duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . indefinite esd rating human body model (tested per jesd22-a114e) . . . . . . . . . . . . . . . . 5kv machine model (tested per jesd-a115-a) . . . . . . . . . . . . . . . . . . . 200v charge device model (tested per jesd22-c101c). . . . . . . . . . . . . 2.2kv latch up (tested per jesd78b; class ii, level a) . . . . . . . . . . . . . . . 100ma thermal resistance (typical) ja (c/w) jc (c/w) 14 ld htssop package (notes 4, 5). . . . . . 37 5 maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +150c maximum storage temperature range . . . . . . . . . . . . . .-65c to +175c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/ pbfree/pb-freereflow.asp recommended operating conditions ambient temperature range . . . . . . . . . . . . . . . . . . . . . . -40c to +125c in pin to gnd voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+3v to +40v out pin to gnd voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+2.5v to +12v en pin to gnd voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0v to +40v caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ja is measured with the component mounted on a high effective thermal conductivity test board in free air. see tech brief tb379 for details. 5. for jc , the ?case temp? location is the center of the exposed metal pad on the package underside. electrical specifications recommended operating conditions, unless otherwise noted. v in = 14v, i out = 1ma, c in = 0.1 f, c out =10 f, t a = t j = -40c to +125c, unless otherwise noted. typical specifications are at t a = +25c. boldface limits apply over the operating temperature range, -40c to +125c. parameter symbol test conditions min (note 8) typ max (note 8) unit input voltage range v in 640 v cold crank condition 340 v guaranteed output current i out v in = v out + vdo 150 ma output voltage v out en = high v in = 14v i out = 0.1ma to 150ma 3.3v version 3.267 3.3 3.333 v 5v version 4.950 5 5.050 v adj pin voltage 1.211 1.223 1.235 v line regulation v out / v in 3v v in 40v i out = 1ma 0.04 0.15 % load regulation v out / i out v in = v out +v do i out = 100a to 150ma 0.3 0.6 % dropout voltage (note 6) v do i out = 1ma, v out = 3.3v 7 33 mv i out = 150ma, v out = 3.3v 380 525 mv i out = 1ma, v out = 5v 7 33 mv i out = 150ma, v out = 5v 295 460 mv shutdown current i shdn en = low 2 3.64 a quiescent current i q en = high v in = 14v i out = 0ma, adj version, v out =v adj 18 24 a i out = 1ma, adj version, v out =v adj 22 42 a i out = 10ma, adj version, v out =v adj 34 60 a i out =150ma, adj version, v out =v adj 90 125 a i out = 0, 3.3v and 5.0v versions 22 28 a i out = 1ma, 3.3v and 5.0v versions 27 45 a i out = 10ma, 3.3v and 5.0v versions 39 65 a i out = 150ma, 3.3v and 5.0v versions 96 142 a
isl78301 5 fn6705.0 october 21, 2011 power supply rejection ratio psrr f = 100hz; v in_ripple = 500mv p-p ; load = 150ma, 3.3v and 5v versions 55 db f = 100hz; v in_ripple = 500mv p-p ; load = 150ma, adj version, v out =v adj 66 en function en threshold voltage v en_h v out = off to on 1.485 v v en_l v out = on to off 0.975 v en pin current i en v out = 0v 0.026 a en to regulation time (note 7) t en 1.65 1.93 ms protection features output current limit i limit v out = 0v 175 410 ma thermal shutdown t shdn junction temperature rising +165 c thermal shutdown hysteresis t hyst +20 c notes: 6. dropout voltage is defined as (v in - v out ) when v out is 2% below the value of v out when v in = v out + 3v. 7. enable to regulation is the time the output takes to reach 95% of its final value with v in = 14v and en is taken from v il to v ih in 5ns. for the adjustable versions, the output voltage is set at 5v. 8. parameters with min and/or max limits are 100% tested at +25 c, unless otherwise specified. te mperature limits established by characterization and are not production tested. electrical specifications recommended operating conditions, unless otherwise noted. v in = 14v, i out = 1ma, c in = 0.1 f, c out =10 f, t a = t j = -40c to +125c, unless otherwise noted. typical specifications are at t a = +25c. boldface limits apply over the operating temperature range, -40c to +125c. (continued) parameter symbol test conditions min (note 8) typ max (note 8) unit
isl78301 6 fn6705.0 october 21, 2011 typical performance curves v in = 14v, i out = 1ma, v out = 5v, t j = +25c unless otherwise specified. figure 4. quiescent cu rrent vs load current figure 5. quiescent current vs input voltage (no load) figure 6. shutdown current vs temperature (en = 0) fi gure 7. output voltage vs temperature (load = 50ma) figure 8. output voltage vs load current figure 9. start-up waveform 0 20 40 60 80 100 120 050100150 load current (ma) -40c +125c +25c quiescent current (a) 0 5 10 15 20 25 30 0 10203040 input voltage (v) -40c +125c +25c quiescent current (a) 0 0.5 1.0 1.5 2.0 2.5 3.0 -50 0 50 100 150 temperature (c) v in = 40v v in = 14v shutdown current (a) -0.010 -0.005 0 0.005 0.010 -50 0 50 100 150 temperature (c) output voltage variation (%) 3.3v option 5v option 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 0 50 100 150 load current (ma) output voltage (v) +25c +125c -40c time = 500s/div 1v/div 500mv/div en vout
isl78301 7 fn6705.0 october 21, 2011 figure 10. power supply rejection ratio (load = 150ma) figure 11. load transient response typical performance curves v in = 14v, i out = 1ma, v out = 5v, t j = +25c unless otherwise specified. (continued) 0 10 20 30 40 50 60 70 100 1k 10k 100k 1m frequency (hz) psrr (db) v out = 5v v out = 3.3v 50ma time = 5ms/div 100mv/div 0ma i out v out
isl78301 8 fn6705.0 october 21, 2011 functional description functional overview the isl78301 is a high performanc e, high voltage, low-dropout regulator (ldo) with 150ma sourcing capability. the part is qualified to operate over the -40c to +125c automotive temperature range. featuring ul tra-low quiescent current, it makes an ideal choice for ?always-on? automotive applications. it works well under a ?load dump condition? where the input voltage could rise up to 40v. the ldo continues to operate down to 3v under a ?cold-crank? condit ion. the device also features current limit and thermal shutdown protection. enable control the isl78301 has an enable pin which turns the device on when pulled high. when en is low, the ic goes into shutdown mode and draws less than 2a. current limit protection the isl78301 has internal current limiting functionality to protect the regulator during fault conditions. during current limit, the output sources a fixed amount of current largely independent of the output voltage. if the short or overload is removed from v out , the output returns to normal voltage regulation mode. thermal fault protection in the event that the die temperature exceeds a typical value of +165c, the output of the ldo will shut down until the die temperature cools down to a typical +145c. the level of power dissipated, combined with the ambient temperature and the thermal impedance of the package, determines if the junction temperature exceeds the thermal shutdown temperature. see the ?power dissipation? section for more details. application information input and output capacitors a minimum 0.1f ceramic capacitor is recommended at the input for proper operation. for the output, a ceramic capacitor with a capacitance of 10f is recommended for the isl78301 to maintain stability. the ground connection of the output capacitor should be routed directly to the gnd pin of the device and also placed close to the ic. output voltage setting for the adjustable version of the isl78301, the output voltage is programmed using an external resistor divider as shown in figure 12. the output voltage is calculated using equation 1: power dissipation the junction temperature must not exceed the range specified in ?recommended operating conditions? on page 4. the power dissipation can be calculated using equation 2: the maximum allowable junction temperature, t j(max) and the maximum expected ambient temperature, t a(max) will determine the maximum allowable junction temperature rise ( t j ), as shown in equation 3: to calculate the maximum ambient operating temperature, use the junction-to-ambient thermal resistance ( ja ) as shown in equation 4: board layout recommendations a good pcb layout is important to achieve expected performance. consideration shou ld be taken when placing the components and routing the trace to minimize the ground impedance and keep the parasitic inductance low. the input and output capacitors should have a good ground connection and be placed as close to the ic as possible. the feedback trace in the adjustable version should be away from other noisy traces. the 14 ld htssop package uses the copper area on the pcb as a heat-sink. the epad of this package must be soldered to the copper plane (gnd plane) for effective heat dissipation. figure 13 shows a curve for ja of the package for different copper area sizes. in out en (isl78301) adj gnd c in 0.1f c out 10f r1 r2 figure 12. adjustable version v out 1.223v r 1 r 2 ------ - 1 + ?? ?? ?? = (eq. 1) p d v in v out ? () i out v in i gnd + = (eq. 2) t j t jmax () t amax () ? = (eq. 3) t jmax () p dmax () x ja t a + = (eq. 4) figure 13. ja vs epad-mount copper land area on pcb 38 36 34 32 30 28 26 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 epad-mount copper land area on pcb, mm 2 theta-ja, c/w
isl78301 9 intersil products are manufactured, assembled and tested utilizing iso9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn6705.0 october 21, 2011 for additional products, see www.intersil.com/product_tree products intersil corporation is a leader in the design and manufacture of high-performance analog semico nductors. the company's product s address some of the industry's fastest growing markets, such as , flat panel displays, cell phones, handheld products, and noteb ooks. intersil's product families address power management and analog sign al processing functions. go to www.intersil.com/products for a complete list of intersil product families. for a complete listing of applications, rela ted documentation and related parts, please see the respective device information p age on intersil.com: isl78301 to report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff fits are available from our website at http://rel.intersil.com/reports/search.php revision history the revision history provided is for inform ational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest rev. date revision change 10/21/11 fn6705.0 initial release.
isl78301 10 fn6705.0 october 21, 2011 package outline drawing m14.173b 14 lead heat-sink thin shrink small outline package (htssop) rev 1, 1/10 bottom view detail "x" typical recommended land pattern top view b a 1 7 8 14 c plane seating 0.10 c 0.10 c b a h pin #1 i.d. mark 5.00 0.10 4.40 0.10 0.25 +0.05/-0.06 6.40 0.20 c b a 0.05 3.10 0.10 3.00 0.10 0-8 gauge plane see 0.90 +0.15/-0.10 0.60 0.15 0.15 +0.05/-0.06 5 2 3 1 3 1.00 ref 0.65 1.20 max 0.25 0.05 min 0.15 max exposed thermal pad side view detail "x" end view 1. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 per side. 2. dimension does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 per side. 3. dimensions are measured at datum plane h. 4. dimensioning and tolerancing per asme y14.5m-1994. 5. dimension does not include dambar protrusion. allowable protrusion shall be 0.80mm total in excess of dimension at maximum material condition. minimum space between protrusion and adjacent lead is 0.07mm. 6. dimension in ( ) are for reference only. 7. conforms to jedec mo-153, variation abt-1. notes: (1.45) (5.65) (0.65 typ) (0.35 typ) (3.10) (3.00)
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